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1 ltc1454/LTC1454L dual 12-bit rail-to-rail micropower dacs daisy-chained control outputs functional block diagram: dual 12-bit rail-to-rail dac x1/x2 b x1/x2 a d in clk d out v cc power-on reset + 12-bit dac a 12-bit dac b refout cs/ld v out b refhi b refhi a reflo gnd 14 16 1 11 8 7 12 2 6 5 3 4 9, 15 ltc1454: 5v LTC1454L: 3v to 5v ltc1454: 2.048v LTC1454L: 1.22v 10 13 v out a + clr 1454 bd02 24-bit shift reg and dac latch m p differential nonlinearity vs input code code 0 dnl error (lsb) 0.5 0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 0.5 1024 2048 2560 1454 g08 512 1536 3072 3584 4095 features n 12-bit resolution n buffered true rail-to-rail voltage output n 5v operation, i cc : 700 m a typ (ltc1454) n 3v operation, i cc : 450 m a typ (LTC1454L) n built-in reference: 2.048v (ltc1454) 1.220v (LTC1454L) n clr pin n power-on reset n 16-lead so package n 3-wire cascadable serial interface n maximum dnl error: 0.5lsb n low cost the ltc ? 1454/LTC1454L are complete single supply, dual rail-to-rail voltage output, 12-bit digital-to-analog converters (dacs) in a 16-lead so package. they include an output buffer amplifier with variable gain ( 1 or 2) and an easy-to-use 3-wire cascadable serial interface. the ltc1454 has an onboard reference of 2.048v and a full-scale output of 4.095v in a 2 gain configuration. it operates from a single 4.5v to 5.5v supply. the LTC1454L has an onboard 1.22v reference and a full- scale output of 2.5v in a 2 gain configuration. it operates from a single 2.7v to 5.5v supply. low power supply current, excellent dnl and small size allow these parts to be used in a host of applications where size, dnl and single supply operation are important. descriptio n u applicatio n s u n digital calibration n industrial process control n automatic test equipment n cellular telephones , ltc and lt are registered trademarks of linear technology corporation. typical applicatio n u
2 ltc1454/LTC1454L absolute m axi m u m ratings w ww u wu u package / o rder i for atio v cc to gnd .............................................. C 0.5v to 7.5v logic inputs to gnd ................................ C 0.5v to 7.5v v out a , v out b , x1/x2 a , x1/x2 b ..................................... C 0.5v to v cc + 0.5v refhi a , refhi b, reflo ............. C 0.5v to v cc + 0.5v maximum junction temperature .......................... 125 c operating temperature range ltc1454c/LTC1454Lc ............................ 0 c to 70 c ltc1454i/LTC1454Li ........................ C 40 c to 85 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c ltc1454cn ltc1454in ltc1454cs ltc1454is LTC1454Lcn LTC1454Lin LTC1454Lcs LTC1454Lis order part number t jmax = 125 c, q ja = 100 c/w (n) t jmax = 125 c, q ja = 150 c/w (s) consult factory for military grade parts. electrical characteristics v cc = 4.5v to 5.5v (ltc1454), 2.7v to 5.5v (LTC1454L), x1/x2 = reflo = gnd, refhi = refout, v out and refout unloaded, t a = t min to t max , unless otherwise noted. symbol parameter conditions min typ max units dac resolution l 12 bits dnl differential nonlinearity guaranteed monotonic (note 1) l 0.5 lsb inl integral nonlinearity t a = 25 c 2.0 4.0 lsb (note 1) l 2.5 4.5 lsb v os offset error t a = 25 c 2.0 12 mv l 4.0 18 mv v os tc offset error temperature 15 m v/ c coefficient v fs full-scale voltage when using internal reference, ltc1454, t a = 25 c 4.065 4.095 4.125 v ltc1454 l 4.045 4.095 4.145 v when using internal reference, LTC1454L, t a = 25 c 2.470 2.500 2.530 v LTC1454L l 2.460 2.500 2.540 v v fs tc full-scale voltage when using internal reference 24 ppm/ c temperature coefficient reference reference output voltage ltc1454 l 2.008 2.048 2.088 v LTC1454L l 1.195 1.220 1.245 v reference output 20 ppm/ c temperature coefficient reference line regulation l 0.7 2.0 lsb/v reference load regulation 0 i out 100 m a, ltc1454 l 0.2 1.5 lsb LTC1454L l 0.6 3.0 lsb reference input range v refhi v cc C 1.5v v cc /2 v reference input resistance l 15 24 40 k w reference input capacitance 15 pf short-circuit current refout shorted to gnd l 40 120 ma top view s package 16-lead plastic so n package 16-lead pdip 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 x1/x2 b clr clk d in cs/ld d out x1/x2 a v out a v out b v cc refhi b gnd reflo refhi a refout v cc
3 ltc1454/LTC1454L electrical characteristics v cc = 4.5v to 5.5v (ltc1454), 2.7v to 5.5v (LTC1454L), x1/x2 = reflo = gnd, refhi = refout, v out and refout unloaded, t a = t min to t max , unless otherwise noted. symbol parameter conditions min typ max units power supply v cc positive supply voltage for specified performance, ltc1454 l 4.5 5.5 v LTC1454L l 2.7 5.5 v i cc supply current 4.5v v cc 5.5v (note 4), ltc1454 l 700 1250 m a 2.7v v cc 5.5v (note 4), LTC1454L l 450 1100 m a op amp dc performance short-circuit current low v out shorted to gnd l 70 120 ma short-circuit current high v out shorted to v cc l 80 120 ma output impedance to gnd input code = 0 l 40 w ac performance voltage output slew rate (note 2) l 0.5 1.0 v/ m s voltage output settling time (notes 2, 3) to 0.5lsb 14 m s digital feedthrough 0.3 nv ? s ac feedthrough refhi = 1khz, 2v p-p , (code: all 0s) C 95 db sinad signal-to-noise + distortion refhi = 1khz, 2v p-p , (code: all 1s) 85 db v cc = 5v (ltc1454), 3v (LTC1454L), t a = t min to t max , unless otherwise noted. ltc1454 LTC1454L symbol parameter conditions min typ max min typ max units digital i/o v ih digital input high voltage l 2.4 2.0 v v il digital input low voltage l 0.8 0.6 v v oh digital output high voltage i out = C 1ma l v cc C 1.0 v cc C 0.7 v v ol digital output low voltage i out = 1ma l 0.4 0.4 v i leak digital input leakage v in = gnd to v cc l 10 10 m a c in digital input capacitance guaranteed by design l 10 10 pf switching t 1 d in valid to clk setup l 40 60 ns t 2 d in valid to clk hold l 00ns t 3 clk high time l 40 60 ns t 4 clk low time l 40 60 ns t 5 cs/ld pulse width l 50 80 ns t 6 lsb clk to cs/ld l 40 60 ns t7 cs/ld low to clk l 20 30 ns t 8 d out output delay c load = 15pf l 150 220 ns t 9 clk low to cs/ld low l 20 30 ns the l denotes specifications which apply over the full operating temperature range. note 1: nonlinearity is defined from the first code that is greater than or equal to the maximum offset specification to code 4095 (full scale). note 2: load is 5k w in parallel with 100pf. note 3: dac switched between all 1s and the code corresponding to v os for the part. note 4: digital inputs at 0v or v cc .
4 ltc1454/LTC1454L typical perfor m a n ce characteristics uw minimum supply headroom for full output swing vs load current ltc1454 output swing vs load resistance code 0 dnl error (lsb) 0.5 0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 0.5 1024 2048 2560 1454 g08 512 1536 3072 3584 4095 code 0 inl error (lsb) 2.0 1.6 1.2 0.8 0.4 0 0.4 0.8 1.2 1.6 2.0 1024 2048 2560 1454 g07 512 1536 3072 3584 4095 load current (ma) v cc ?v out (v) 1.0 0.8 0.6 0.4 0.2 0 1454 g03 0 ? v out < 1lsb reflo = gnd x1/x2 = gnd code: all 1's v out = 4.095v 5 10 15 20 25 30 ltc1454 minimum output voltage vs output sink current ltc1454 output swing vs load resistance output sink current (ma) output pull-down voltage (mv) 1000 900 800 700 600 500 400 300 200 100 0.1 1454 g04 0 125 c reflo = gnd x1/x2 = gnd ?5 c 25 c 5 10 15 20 25 30 load resistance ( w ) 10 output swing (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100 1k 10k 1454 g05 r l reflo = gnd x1/x2 = gnd load resistance ( w ) 10 output swing (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100 1k 10k 1458 g06 reflo = gnd x1/x2 = gnd r l v cc ltc1454 full-scale voltage vs temperature temperature ( c) ?5 sfull-scale voltage (v) ?5 5 1454 g02 95 125 4.110 4.105 4.100 4.095 4.090 4.085 4.080 35 65 temperature ( c) ?5 supply current ( m a) ?5 5 1454 g01 95 125 760 750 740 730 720 710 700 690 35 65 v cc = 5.5v v cc = 5v v cc = 4.5v ltc1454 supply current vs temperature logic input voltage (v) 0 supply current (ma) 2.6 2.1 1.6 1.1 0.6 1.0 2.0 2.5 4.5 5.0 1454 g09 0.5 1.5 3.0 3.5 4.0 ltc1454 supply current vs logic input voltage ltc1454 differential nonlinearity ltc1454 integral nonlinearity
5 ltc1454/LTC1454L x1/x2 b, x1/ x2 a (pins 1, 7): the input pin that sets the gain for dac a/b. when grounded the gain will be 2, i.e., output full scale will be 2 refhi. when connected to v out the gain will be 1, i.e., output full scale will be equal to refhi. clr (pin 2): the clear pin for the dac. clears both dacs to zero scale when pulled low. this pin should be tied to v cc for normal operation. clk (pin 3): the serial interface clock input. d in (pin 4): the serial data input. data on the d in pin is latched into the shift register on the rising edge of the serial clock. data is loaded as one 24-bit word. the first 12 bits are for dac a, msb-first and the second 12 bits are for dac b, msb-first. cs/ld (pin 5): the serial interface enable and load control input. when cs/ld is low the clk signal is enabled so the data can be clocked in. when cs/ld is pi n fu n ctio n s uuu pulled high, data is loaded from the shift register into the dac register, updating the dac output. d out (pin 6): the output of the shift register which becomes valid on the rising edge of the serial clock. v out a, v out b (pins 8, 16): the buffered dac outputs. v cc (pins 9, 15): the positive supply input. 4.5 v cc 5.5v (ltc1454), 2.7v v cc 5.5v (LTC1454L). re- quires a bypass capacitor to ground. refout (pin 10): the output of the internal reference. refhi a , refhi b (pins 11,14): the inputs to the dac resistor ladder for dac a/b. reflo (pin 12): the bottom of the dac resistor ladder for both dacs. this can be used to offset zero-scale above ground. reflo should be connected to ground when no offset is required. gnd (pin 13): ground.
6 ltc1454/LTC1454L ld ld 12-bit dac b register 12-bit dac a register power-on reset 3 4 5 6 15 13 12 11 10 9 dac b dac a + a + b reference ltc1454: 2.048v LTC1454L: 1.22v x1/x2 b r r clk d in cs/ld d out v out a v out b v cc refhi b gnd reflo refhi a refout v cc 1454 bd01 1 clr 2 x1/x2 a 7 8 16 r r 24-bit shift register 14 w i dagra b l o c k ti i g diagra wu w b11 a msb b11 b msb b0 a lsb t 1 t 6 b0 b lsb b11 a current word t 7 t 2 t 4 t 3 t 8 clk d in d out cs/ld t 5 1454/5 ?td01 b0 b previous word b11 a previous word b10 a previous word b0 a previous word b11 b previous word b0 b previous word t 9
7 ltc1454/LTC1454L defi itio s uu lsb = (v fs C v os )/(2 n C 1) = (v fs C v os )/4095 nominal lsbs: ltc1454 lsb = 4.095v/4095 = 1mv LTC1454L lsb = 2.5v/4095 = 0.610mv integral nonlinearity (inl): end-point inl is the maxi- mum deviation from a straight line passing through the end-points of the dac transfer curve. because the part operates from a single supply and the output cannot go below zero, the linearity is measured between full scale and the code corresponding to the maximum offset speci- fication. the inl error at a given input code is calculated as follows: inl = [v out C v os C (v fs C v os )(code/4095)]/lsb v out = the output voltage of the dac measured at the given input code differential nonlinearity (dnl): dnl is the difference between the measured change and the ideal 1lsb change between any two adjacent codes. the dnl error between any two codes is calculated as follows: dnl = ( d v out C lsb)/lsb d v out = the measured voltage difference between two adjacent codes digital feedthrough: the glitch that appears at the analog output caused by ac coupling from the digital inputs when they change state. the area of the glitch is specified in (nv)(sec). resolution (n): resolution is defined as the number of digital input bits, n. it defines the number of dac output states (2 n ) that divide the full-scale range. the resolution does not imply linearity. full-scale voltage (v fs ): this is the output of the dac when all bits are set to 1. voltage offset error (v os ): the theoretical voltage at the output when the dac is loaded with all zeros. the output amplifier can have a true negative offset, but because the part is operated from a single supply, the output cannot go below zero. if the offset is negative, the output will remain near 0v resulting in the transfer curve shown in figure 1. dac code ltc1454/5 ?f01 output voltage negative offset 0v figure 1. effect of negative offset the offset of the part is measured at the code that corre- sponds to the maximum offset specification: v os = v out C (code)(v fs )/(2 n C 1) least significant bit (lsb): one lsb is the ideal voltage difference between two successive codes.
8 ltc1454/LTC1454L operatio u serial interface the data on the d in input is loaded into the shift register on the rising edge of the clock. data is loaded as one 24-bit word, dac a first, then dac b. the msb is loaded first for each dac. the dac registers load the data from the shift register when cs/ld is pulled high. the clk is disabled internally when cs/ld is high. note: clk must be low before cs/ld is pulled low to avoid an extra internal clock pulse. the buffered output of the 24-bit shift register is available on the d out pin which swings from ground to v cc . multiple ltc1454/LTC1454Ls may be daisy-chained to- gether by connecting the d out pin to the d in pin of the next chip, while the clk and cs/ld signals remain common to all chips in the daisy-chain. the serial data is clocked to all of the chips, then the cs/ld signal is pulled high to update all of them simultaneously. reference the LTC1454L has an internal reference of 1.22v with a full scale of 2.5v (gain of 2 configuration). the ltc1454 includes an internal 2.048v reference, making 1lsb equal to 1mv (gain of 2 configuration). when the buffer gain is 2, the external reference must be less than v cc /2 and be capable of driving the 15k minimum dac resistor ladder. with a gain of 1 configuration the external reference must be less than v cc C 1.5v. voltage output the rail-to-rail buffered output of the ltc1454 family can source or sink 5ma when operating with a 5v supply while pulling to within 300mv of the positive supply voltage or ground. the output swings to within a few millivolts of either supply rail when unloaded and has an equivalent output resistance of 40 w when driving a load to the rails. the output can drive 1000pf without going into oscilla- tion.
9 ltc1454/LTC1454L figure 2 applicatio n s i n for m atio n wu u u a single supply, 4-quadrant multiplying dac the ltc1454 can also be used for 4-quadrant multiplying with an offset signal ground of 1.22v. this application is shown in figure 2. the inputs are connected to refhi b or refhi a and have a 1.22v amplitude around a signal ground of 1.22v. the outputs will swing from 0v to 2.44v, as shown by the equation with the figure. since the signal ground is around 1.22v, reflo is offset above ground by using an lt1034cs8-1.2 as shown. v out b v cc refhi b gnd reflo refhi a refout v cc v out b v out a v inb 1.22v 1.22v v ina 1.22v 1.22v lt1034cs8-1.2 clk d in cs/ld ltc1454 1454 f02 x1/x2 b clr clk d in cs/ld d out x1/x2 a v out a 5v 0.1 f 10k v oa/b = v in ?v reflo gain ?1 +1 + v reflo = v in ?1.22 2.0 ?1.0 + 1.22v () () () () d in 4096 d in 4096
10 ltc1454/LTC1454L dimensions in inches (millimeters) unless otherwise noted. package descriptio n u n package 16-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n16 0695 0.255 0.015* (6.477 0.381) 0.770* (19.558) max 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0.015 (0.381) min 0.125 (3.175) min 0.130 0.005 (3.302 0.127) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.018 0.003 (0.457 0.076) 0.005 (0.127) min 0.100 0.010 (2.540 0.254) 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.025 0.015 +0.635 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm)
11 ltc1454/LTC1454L dimensions in inches (millimeters) unless otherwise noted. package descriptio n u s package 16-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 1 2 3 4 5 6 7 8 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 s16 0695 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12 ltc1454/LTC1454L typical applicatio n u ? linear technology corporation 1996 1454lf lt/tp 0397 7k ? printed in usa v out b v cc refhi b gnd reflo refhi a refout v cc ltc1454 LTC1454L 1454 ta01 x1/x2 b clr clk d in cs/ld d out x1/x2 a v out a to next dac for daisy-chaining output a ltc1454: 0v to 4.095v LTC1454L: 0v to 2.5v ltc1454: 2.048v LTC1454L: 1.22v output b ltc1454: 0v to 4.095v LTC1454L: 0v to 2.5v ltc1454: 4.5v to 5.5v LTC1454L: 2.7v to 5.5v 0.1 f p related parts part number description comments ltc1257 single 12-bit v out dac, full scale: 2.048v, v cc : 4.75v to 15.75v, 5v to 15v single supply, complete v out dac in reference can be overdriven up to 12v, i.e., fs max = 12v so-8 package ltc1446/ltc1446l dual 12-bit rail-to-rail output dacs in an so-8 package ltc1446: v cc = 4.5v to 5.5v, v out = 0v to 4.095v ltc1446l: v cc = 2.7v to 5.5v, v out = 0v to 2.5v ltc1450/ltc1450l single 12-bit rail-to-rail output dacs with parallel interface ltc1450: v cc = 4.5v to 5.5v, v out = 0v to 4.095v ltc1450l: v cc = 2.7v to 5.5v, v out = 0v to 2.5v ltc1451 single 12-bit dac, full scale: 4.095v, v cc : 4.5v to 5.5v low power, complete v out dac in so-8 package ltc1452 single 12-bit rail-to-rail output v out multiplying dac, low power, multiplying v out dac with rail-to-rail v cc : 2.7v to 5.5v buffer amplifier in so-8 package ltc1453 single 12-bit v out dac, full scale: 2.5v, v cc : 2.7v to 5.5v 3v, low power, complete v out dac in so-8 package ltc1456 single rail-to-rail output 12-bit dac with clear pin, low power, complete v out dac in so-8 package, with full scale: 4.095v, v cc : 4.5v to 5.5v clear pin ltc1458/ltc1458l quad 12-bit rail-to-rail output dacs ltc1458: v cc = 4.5v to 5.5v, v out = 0v to 4.095v ltc1458l: v cc = 2.7v to 5.5v, v out = 0v to 2.5v linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 l (408) 432-1900 fax: (408) 434-0507 l telex: 499-3977 l www.linear-tech.com

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